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SAM7-P256 development board users manual all boards produced by olimex are rohs compliant rev. f, august 2008 copyright(c) 2010, olimex ltd, all rights reserved page 1
introduction: atmels at91sam7s256 is a member of a series of low pincount flash mi - crocontrollers based on the 32-bit arm risc processor. it features a 256 kbyte high-speed flash and a 64 kbyte sram, a large set of peripherals, including a usb 2.0 device, and a complete set of system functions minimizing the number of ex - ternal components. the device is an ideal migration path for 8-bit microcontroller users looking for additional performance and extended memory. the embedded flash memory can be programmed in-system via the jtag- ice interface or via a parallel interface on a production programmer prior to mounting. built-in lock bits and a security bit protect the firmware from accidental overwrite and preserves its confidentiality. the at91sam7s256 system controller includes a reset controller capable of managing the power-on sequence of the microcontroller and the complete sys - tem. correct device operation can be monitored by a built-in brownout detector and a watchdog running off an integrated rc oscillator. the at91sam7s256 is a general-purpose microcontroller. its integrated usb device port makes it an ideal device for peripheral applications requiring con - nectivity to a pc or cellular phone. its aggressive price point and high level of in - tegration pushes its scope of use far into the cost-sensitive, high-volume consumer market. board features: microcontroller: at91sam7s256 16/32 bit arm7tdmi? with 256k bytes program flash, 64k bytes ram, usb 2.0, rtt, 10 bit adc 384 ksps, 2x uarts, twi (i2c), spi, 3x 32bit timers, 4x pwm, ssc, wdt, pdc (dma) for all peripherals, up to 60mhz operation standard jtag connector with arm 2x10 pin layout for program - ming/debugging with arm-jtag usb connector two channel rs232 interface and drivers sd/mmc card connector two buttons trimpot connected to adc thermistor connected to adc two status leds on board voltage regulator 3.3v with up to 800ma current single power supply: 6v ac or dc required power supply led power supply filtering capacitor reset circuit reset button page 2
18.432 mhz crystal on socket extension headers for all microcontroller's ports pcb: fr-4, 1.5 mm (0,062"), soldermask, silkscreen component print dimensions: 120 x 80 mm (4.7 x 3.15") electrostatic warning: the SAM7-P256 board is shipped in protective anti-static packaging. the board must not be subject to high electrostatic potentials. general practice for working with static sensitive devices should be applied when working with this board. board use requirements: cables: the cable you will need depends on the programmer/debugger you use. if you use arm-jtag-ew , you will need usb a-b cable. hardware: programmer/debugger arm-jtag-ew or other compatible programming/debugging tool if you work with ew-arm. you can use also arm-usb-ocd , arm-usb-tiny , arm-usb-tiny-h . processor features: SAM7-P256 board use at91 arm thumb-based microcontroller at91sam7s256 from atmel corporation with these features: - high-performance 32-bit risc architecture - high-density 16-bit instruction set - leader in mips/watt - embeddedice ? in-circuit emulation, debug communication channel support - internal high-speed flash - 256 kbytes organized in 1024 pages of 256 bytes (single plane) - single cycle access at up to 30 mhz in worst case conditions - prefetch buffer optimizing thumb instruction execution at maximum speed - page programming time: 6 ms, including page auto-erase, full erase time: 15 ms - 10,000 write cycles, 10-year data retention capability, sector lock capabilities, flash security bit - fast flash programming interface for high volume production - internal high-speed sram, single-cycle access at maximum speed page 3
- 64 kbytes - memory controller (mc) - embedded flash controller, abort status and misalignment detection - reset controller (rstc) - based on power-on reset and low-power factory-calibrated brown-out detector - provides external reset signal shaping and reset source status - clock generator (ckgr) - low-power rc oscillator, 3 to 20 mhz on-chip oscillator and one pll - power management controller (pmc) - software power optimization capabilities, including slow clock mode (down to 500 hz) and idle mode - three programmable external clock signals - advanced interrupt controller (aic) - individually maskable, eight-level priority, vectored interrupt sources - two external interrupt source(s) and one fast interrupt source, spurious interrupt protected - debug unit (dbgu) - 2-wire uart and support for debug communication channel interrupt, programmable ice access prevention - mode for general purpose 2-wire uart serial communication - periodic interval timer (pit) - 20-bit programmable counter plus 12-bit interval counter - windowed watchdog (wdt) - 12-bit key-protected programmable counter - provides reset or interrupt signals to the system - counter may be stopped while the processor is in debug state or in idle mode - real-time timer (rtt) - 32-bit free-running counter with alarm - runs off the internal rc oscillator - one parallel input/output controller (pioa) - thirty-two programmable i/o lines multiplexed with up to two peripheral i/os - input change interrupt capability on each i/o line - individually programmable open-drain, pull-up resistor and synchronous output page 4
- eleven peripheral dma controller (pdc) channels - one usb 2.0 full speed (12 mbits per second) device port - on-chip transceiver, 328-byte configurable integrated fifos - one synchronous serial controller (ssc) - independent clock and frame sync signals for each receiver and transmitter - i 2 s analog interface support, time division multiplex support - high-speed continuous data stream capabilities with 32-bit data transfer - two universal synchronous/asynchronous receiver transmitters (usart) - individual baud rate generator, irda? infrared modulation/demodulation - support for iso7816 t0/t1 smart card, hardware handshaking, rs485 support - full modem line support on usart1 - one master/slave serial peripheral interface (spi) - 8- to 16-bit programmable data length, four external peripheral chip selects - one three-channel 16-bit timer/counter (tc) - three external clock input and two multi-purpose i/o pins per channel - double pwm generation, capture/waveform mode, up/down capability - one four-channel 16-bit pwm controller (pwmc) - one two-wire interface (twi) - master mode support only, all two-wire atmel eeproms and i 2 c compatible devices supported - one 8-channel 10-bit analog-to-digital converter, four channels multiplexed with digital i/os - sam-ba? boot assistant - default boot program - interface with sam-ba graphic user interface - ieee ? 1149.1 jtag boundary scan on all digital pins - 5v-tolerant i/os, including four high-current drive i/o lines, up to 16 ma each - power supplies - embedded 1.8v regulator, drawing up to 100 ma for the core and external components - 3.3v or 1.8v vddio i/o lines power supply, independent 3.3v vddflash flash power supply page 5
- 1.8v vddcore core power supply with brown-out detector - fully static operation: up to 55 mhz at 1.65v and 85 ? c worst case condition page 6
block diagram: page 7
memory map: page 8
schematic: page 9 1 0 k 1 5 p 1 5 p 3 3 p 1 0 0 n 4 7 0 u f / 1 6 v d c 1 0 0 n 1 0 0 n n a 1 0 0 n 1 0 0 n n a 1 0 0 n 4 7 u f / 6 . 3 v 1 0 0 n 1 0 0 n 1 0 0 n 1 0 0 n 1 0 0 n 1 0 0 n 1 0 0 n 1 0 0 n 1 0 0 n 1 n 1 0 0 n 2 . 2 u f 1 n f 1 0 p 1 0 p 1 0 n f 2 . 2 u f 4 7 u f / 6 . 3 v 1 0 n 1 n 5 8 1 9 i r l m l 6 4 0 2 i r l m l 6 4 0 2 b - d i l 4 7 0 n h + 5 v 1 8 . 4 3 2 m h z 4 7 k 4 7 k 4 7 k 4 7 k 0 0 5 6 0 1 0 k 1 . 5 k 1 5 k 2 2 k 4 7 k 1 0 k 1 0 k 1 . 5 k 1 0 0 1 0 k 4 7 k 2 k 2 4 0 / 1 % 3 9 0 / 1 % 3 3 k 3 3 k 2 k 5 6 0 0 0 4 7 k 5 6 0 4 7 k 4 7 k 3 3 0 k 0 3 3 0 k 2 7 2 7 n a 4 7 k 1 . 5 k 1 0 0 3 3 0 3 3 0 3 3 k 3 3 0 3 3 0 4 . 7 k 4 . 7 k s d - c a r d t e r m i s t o r m a x 3 2 3 2 m c p 1 3 0 t u s b _ s h i e l d 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v 3 . 3 v l m 1 1 1 7 a d 4 a d 5 b 1 b 1 b 2 b 2 c p c p d m _ p u p d m _ p u p d p _ p u p d p _ p u p l e d 1 l e d 1 l e d 2 l e d 2 m i s o m i s o m i s o m i s o m o s i m o s i m o s i m o s i n p c s 0 n p c s 0 n p c s 0 n p c s 1 n p c s 1 r 0 o u t r 0 o u t r s t r s t r s t r s t r t c k r x 0 i n r x 1 i n r x 1 i n r x d 1 r x d 1 r x d 1 s p c k s p c k s p c k s p c k t 0 i n t 0 i n t c k t c k t d i t d i t d o t d o t m s t m s t r s t t w c k t w c k t w d t w d t x 0 o u t t x 1 o u t t x 1 o u t t x d 1 t x d 1 t x d 1 u s b _ d u s b _ d w p w p + 5 v _ u s b 3 . 3 v a d 6 a d 7 a n _ t r b 1 b 2 1 2 b d s c 1 c 2 c 3 c 4 c 5 c 6 c 7 c 8 c 9 c 1 0 c 1 1 c 1 2 c 1 3 c 1 4 c 1 5 c 1 6 c 1 7 c 1 8 c 1 9 c 2 0 c 2 1 c 2 2 c 2 3 c 2 4 c 2 5 c 2 6 c 2 7 c 2 8 c 2 9 c 3 0 c 3 1 c 3 2 d 1 f e t 1 f e t 3 g 1 g n d g r e e n 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 j t a g l 1 1 2 l e d 1 1 2 l e d 2 p a 0 p a 1 p a 2 p a 3 p a 4 p a 5 p a 6 p a 7 p a 8 p a 9 p a 1 0 p a 1 1 p a 1 2 p a 1 3 p a 1 4 p a 1 5 p a 2 3 p a 2 5 p a 2 6 p a 2 7 p a 2 8 p a 2 9 p a 3 0 p a 3 1 p w r p w r _ l e d q 1 r 1 r 2 r 3 r 4 r 5 r 6 r 7 r 8 r 9 r 1 0 r 1 1 r 1 2 r 1 3 r 1 4 r 1 5 r 1 6 r 1 7 r 1 8 r 1 9 r 2 0 r 2 1 r 2 2 r 2 3 r 2 4 r 2 5 r 2 6 r 2 7 r 2 8 r 2 9 r 3 0 r 3 1 r 3 2 r 3 3 r 3 4 r 3 5 r 3 6 r 3 7 r 3 8 r 3 9 r 4 0 r 4 1 r 4 2 r 4 3 r 4 4 r 4 5 r 4 6 r 4 7 r e s e t 1 2 3 4 5 6 7 8 9 r s 2 3 2 _ 0 / d 1 2 3 4 5 6 7 8 9 r s 2 3 2 _ 1 r s t 1 2 3 r x d 0 / d r x d c d / d a t 3 / c s 1 c l k / s c l k 5 c m d / d i 2 c p 1 1 3 c p 2 1 5 d a t 0 / d o 7 d a t 1 / r e s 8 d a t 2 / r e s 9 v d d 4 v s s 1 3 v s s 2 6 w p 1 1 0 w p 2 1 4 s d / m m c 1 2 t e s t t h 1 1 2 3 t x d 0 / d t x d a d 4 3 a d 5 4 a d 6 5 a d 7 6 a d v r e f 1 d d m 5 6 d d p 5 7 e r a s e 5 5 g n d 1 2 g n d 2 1 7 g n d 3 4 6 g n d 4 6 0 j t a g s e l 5 0 n r s t 3 9 p a 0 / p w m 0 / t i o a 0 4 8 p a 1 / p w m 1 / t i o b 0 4 7 p a 2 / p w m 2 / s c k 0 4 4 p a 3 / t w d / n p c s 3 4 3 p a 4 / t w c k / t c l k 0 3 6 p a 5 / r x d 0 / n p c s 3 3 5 p a 6 / t x d 0 / p c k 0 3 4 p a 7 / r t s 0 / p w m 3 3 2 p a 8 / c t s 0 / a d t r g 3 1 p a 9 / d r x d / n p c s 1 3 0 p a 1 0 / d t x d / n p c s 2 2 9 p a 1 1 / n p c s 0 / p w m 0 2 8 p a 1 2 / m i s o / p w m 1 2 7 p a 1 3 / m o s i / p w m 2 2 2 p a 1 4 / s p c k / p w m 3 2 1 p a 1 5 / t f / t i o a 1 2 0 p a 1 6 / t k / t i o b 1 1 9 p a 1 7 / t d / p c k 1 / a d 0 9 p a 1 8 / r d / p c k 2 / a d 1 1 0 p a 1 9 / r k / f i q / a d 2 1 3 p a 2 0 / r f / i r q 0 / a d 3 1 6 p a 2 1 / r x d 1 / p c k 1 1 1 p a 2 2 / t x d 1 / n p c s 3 1 4 p a 2 3 / s c k 1 / p w m 0 1 5 p a 2 4 / r t s 1 / p w m 1 2 3 p a 2 5 / c t s 1 / p w m 2 2 5 p a 2 6 / d c d 1 / t i o a 2 2 6 p a 2 7 / d t r 1 / t i o b 2 3 7 p a 2 8 / d s r 1 / t c l k 1 3 8 p a 2 9 / r i 1 / t c l k 2 4 1 p a 3 0 / i r q 1 / n p c s 2 4 2 p a 3 1 / n p c s 1 / p c k 2 5 2 p l l r c 6 3 t c k 5 3 t d i 3 3 t d o 4 9 t m s 5 1 t s t 4 0 v d d c o r e 1 1 2 v d d c o r e 2 2 4 v d d c o r e 3 5 4 v d d f l a s h 5 9 v d d i n 7 v d d i o 1 1 8 v d d i o 2 4 5 v d d i o 3 5 8 v d d o u t 8 v d d p l l 6 4 x i n 6 2 x o u t 6 1 u 1 a t 9 1 s a m 7 s 2 5 6 c 1 + 1 c 1 - 3 c 2 + 4 c 2 - 5 r 1 i n 1 3 r 1 o u t 1 2 r 2 i n 8 r 2 o u t 9 t 1 i n 1 1 t 1 o u t 1 4 t 2 i n 1 0 t 2 o u t 7 v + 2 v - 6 u 2 1 5 1 6 g n d v c c u 2 p w r 3 1 2 u 5 g n d v c c r e s e t 1 2 3 4 5 6 7 8 9 1 0 u e x t 1 2 3 4 u s b a d j / g n d i n o u t v r 1 ( 3 . 3 v ) v r e f 1 2 v r e f _ p y e l l o w 6 v d c 4 . 5 v a c s a m 7 - p 2 5 6 r e v . f c o p y r i g h t ( c ) 2 0 0 8 , o l i m e x l t d . h t t p : / / w w w . o l i m e x . c o m / d e v + + + + usb s h i e l d
board layout: page 10
power supply circuit: SAM7-P256 is typically power supplied with 6 vdc. the programmed board power consumption is about 30 ma. reset circuit: SAM7-P256 reset circuit includes u5 (mcp130t), r8 (10k), pin 15 of jtag connector, pin 39 (nrst) of at91sam7s256 and reset button. clock circuit: quartz crystal q1 18.432 mhz is connected to at91sam7s256 pin 61 (xout) and pin 62 (xin). jumper description: page 11
description for programming via rs232_0/d com port, when is sam- ba software the at91sam7s256 can be programmed via com port using the sam-ba tm software. before being able to use sam-ba, a recovery procedure, which consists of copying the sam-ba boot assistant into flash must be performed as follows: 1. power down the at91sam7s256 2. close jumper tst 3. power up the at91sam7s256 4. wait 10 sec 5. power down the at91sam7s256 6. remove jumper tst 7. power up the at91sam7s256 note: for programming via com port, you must set jumpers rxd0/drxd and txd0/dtxd, according to jumpers description above. input/output: status led (green) with name green connected via jumper led1 to at91sam7s256 pin 10 (pa18/rd/pck2/ad1). status led (yellow) with name yellow connected via jumper led2 to at91sam7s256 pin 9 (ppa17/td/pck1/ad0). power-on led (red) with name pwr_led C this led shows that +3.3v is applied to the board. user button with name b1 connected to at91sam7s256 pin 13 (pa19/rk/fiq/ad2). user button with name b2 connected to at91sam7s256 pin 16 (pa20/rf/irq0/ad3). user button with name reset connected to at91sam7s256 pin 39 (nrst). trimpot with name an_tr connected to at91sam7s256 pin 3 (ad4). thermistor with name th1 connected to at91sam7s256 pin 4 (ad5). page 12
external connectors description: rs232_0/d: pin # signal name 1 nc 2 tx0out 3 rx0in 4 nc 5 gnd 6 nc 7 nc 8 nc 9 nc rs232_1: pin # signal name 1 nc 2 tx1out 3 rx1in 4 nc 5 gnd 6 nc 7 nc 8 nc 9 nc page 13
pwr_jack: pin # signal name 1 power input 2 gnd uext: pin # signal name 1 3.3v 2 gnd 3 txd1 4 rxd1 5 twck 6 twd 7 miso 8 mosi 9 spck 10 npcs1 jtag: the jtag connector allows the software debugger to talk via a jtag (joint test action group) port directly to the core. instructions may be inserted and executed by the core thus allowing at91sam7s256 memory to be programmed with code and executed step by step by the host software. for more details refer to ieee standard 1149.1 - 1990 standard test access port and boundary scan architecture and at91sam7s256 datasheets and users manual. page 14
pin # signal name pin # signal name 1 3.3v 2 3.3v 3 trst 4 gnd 5 tdi 6 gnd 7 tms 8 gnd 9 tck 10 gnd 11 rtck 12 gnd 13 tdo 14 gnd 15 rst 16 gnd 17 nc 18 gnd 19 nc 20 gnd usb pin # signal name 1 +5v_usb 2 ddm 3 ddp 4 gnd sd/mmc page 15
pin # signal name pin # signal name 1 npcs0 2 mosi 3 gnd (vss1) 4 vdd 5 spck 6 gnd (vss2) 7 miso 8 via r30 (47k) to 3.3v 9 via r31 (47k) to 3.3v 10 wp 11 via r19 (2k) to gnd 12 via r24 (2k) to gnd 13 cp 14 via r19 (2k) to gnd 15 via r24 (2k) to gnd page 16
extension port page 17
mechanical dimensions: page 18
available demo software: ? SAM7-P256 blinking led project and binary code for sam-ba load ? SAM7-P256 sample mouse driver project ? uart routines project ? sd/mmc read/write routines project ? button read, temperature measurement project ? mod-smb380 read demo code for ew-arm 4.11 with sam7-p64/256 board ? usb virtual com port for gcc+openocd+eclipse ? openocd + eclipse set of projects 1.00 include flash write make file for SAM7-P256 page 19
order code: SAM7-P256 - assembled and tested board how to order? you can order to us directly or by any of our distributors. check our web www.olimex.com/dev for more info. revision history: revision f, august 2008 page 20
disclaimer: ? 2010 olimex ltd. all rights reserved. olimex?, logo and combinations thereof, are registered trademarks of olimex ltd. other terms and product names may be trademarks of others. the information in this document is provided in connection with olimex products. no license, express or implied or otherwise, to any intellectual property right is granted by this document or in connection with the sale of olimex products. neither the whole nor any part of the information contained in or the product described in this document may be adapted or reproduced in any material from except with the prior written permission of the copyright holder. the product described in this document is subject to continuous development and improvements. all particulars of the product and its use contained in this document are given by olimex in good faith. however all warranties implied or expressed including but not limited to implied warranties of merchantability or fitness for purpose are excluded. this document is intended only to assist the reader in the use of the product. olimex ltd. shall not be liable for any loss or damage arising from the use of any information in this document or any error or omission in such information or any incorrect use of the product. page 21

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